Since a CMOS image sensor operates with a single power supply in low power consumption as compared with a CCD image sensor and can be manufactured by a standard CMOS process, there is an advantage that a system on chip is easy. In recent years, a CMOS image sensor has started to be used based on this advantage even in a high-grade single lens reflex type digital still camera and a mobile phone.
In FIG. 54 and FIG. 55, simplified constitutions of a CCD image sensor and a CMOS image sensor are shown respectively.
A CCD image sensor 1 shown in FIG. 54 is formed in a constitution that a plurality of light receiving sensors (photoelectric conversion elements) 3 which become pixels are arranged regularly in an imaging region 2, for example, in a two dimensional matrix form and at the same time, vertical transfer registers 4 of a CCD structure which transfer signal charges in the vertical direction are arranged corresponding to respective light receiving sensor columns, further, a horizontal transfer register 5 of a CCD structure which is connected with respective vertical transfer registers 4 and which transfers signal charges in the horizontal direction is arranged, and an output unit 6 converting charge voltages to voltage signals and outputting the voltage signals is connected at the final stage of this horizontal transfer register 5. In this CCD image sensor 1, light received by the imaging region 2 is converted to signal charges in respective light receiving sensors 3 and is accumulated, and the signal charges of these respective light receiving sensors 3 are read out to the vertical transfer registers 4 through a readout gate portion 7 and are transferred in the vertical direction. Also, signal charges read out from the vertical transfer registers 4 to the horizontal transfer register 5 on a line-to-line basis are transferred in the horizontal direction, converted to voltage signals by the output unit 6, and outputted as image signals.
On the other hand, a CMOS image sensor 11 shown in FIG. 55 is constituted by being provided with an imaging region 13 in which a plurality of pixels 12 are arranged, a control circuit 14, a vertical drive circuit 15, a column unit 16, a horizontal drive circuit 17, and an output circuit 18. In the imaging region 13, a plurality of pixels 12 are regularly arranged two dimensionally, for example, in a two dimensional matrix form. Each pixel 12 is formed by a photoelectric conversion element (for example, photodiode) and a plurality of MOS transistors. The control circuit 14 receives an input clock, and data for instructing an operation mode or the like, and also outputs data including information of the image sensor.
In this CMOS image sensor 11, a line of pixels 12 is selected by a drive pulse from the vertical drive circuit 15, and outputs of the pixels 12 of the selected line are transmitted to the column unit 16 through vertical selection lines 21. In the column unit 16, column signal processing circuits 19 are arranged corresponding to the columns of pixels and receive signals of the pixels 12 for one line, and processes such as CDS (Correlated Double Sampling: process for eliminating fixed pattern noise), signal amplification, analog/digital (AD) conversion or the like are applied to the signals. Then, the column signal processing circuits 19 are sequentially selected by the horizontal drive circuit 17, and signals thereof are introduced to a horizontal signal line 20 and are outputted from the output circuit 18 as image signals.
There are shown, in FIGS. 56A and 56B, accumulation timing charts of pixel lines corresponding to respective scanning lines of the CCD image sensor 1 and the CMOS image sensor 11. In the case of the CCD image sensor 1, signal charges are accumulated in respective light receiving sensors 3 during the same period, and the signal charges are read out from the light receiving sensors 3 to the vertical transfer register 4 for all the pixels simultaneously. More specifically, as shown in FIG. 56A, signal charges of the pixels of all the lines are accumulated at the same time instant during an accumulation period of a certain frame. Thereby, simultaneity of accumulation is obtained, and simultaneous electronic shuttering is made possible.
On the other hand, in the case of the CMOS image sensor 11, due to its fundamental operation method, the pixel 12 which has outputted a signal starts accumulation of a photoelectrically converted signal again from that time point, so that as shown in FIG. 56B, accumulation periods are shifted in accordance with scanning timings in a certain frame period. Owing to this fact, simultaneity of accumulation is not obtained, and simultaneous electronic shuttering cannot be obtained. More specifically, in the CMOS image sensor 11, because a vertical transfer register which delays the transfer timing as in the case of the CCD image sensor is not provided, timing for transmitting data to the column signal processing circuit is adjusted by adjusting the pixel accumulation period in accordance with the reset timing. For this reason, it is necessary to shift accumulation periods of signal charges, and a simultaneous shutter configuration to perform charge accumulation of all the pixels at the same timing cannot be realized (see page 179 of Non-patent Document 1).
In particular, this difference comes out when imaging a moving picture at a high speed. FIGS. 57A and 57B show recorded pictures when a fan rotating at a high speed is recorded with a CCD image sensor and a CMOS image sensor. As can be appreciated from the same drawings, a fan 25 recorded by the CCD image sensor is recorded normally, but the fan 25 recorded by the CMOS image sensor is recorded distorted in its shape (see page 180 of Non-patent Document 1).
[Non-patent Document 1] [Basic and Application of CCD/CMOS Image Sensor] by Kazuya Yonemoto, published from CQ Publishing Kabushiki-kaisha on Aug. 10, 2003, pages 179 to 180
As a countermeasure for imaging a picture moving at a high speed in the above-mentioned CMOS image sensor, there has been proposed a constitution shown in FIG. 52 and FIG. 53. This CMOS image sensor 31 is a one applied to a front-illuminated type CMOS image sensor, and as shown in a plane block layout of FIG. 52, it is constituted by forming in a necessary region of one semiconductor chip, an imaging region, a so-called photodiode PD/sensor circuit region 32, in which pixels, each of which is composed of a photodiode as a photoelectric conversion element and a plurality of MOS transistors, are arranged, and an ADC/memory region 33 in which a plurality of analog/digital (AD) conversion circuits connected with respective pixels and memory means are arranged, adjacent to this photodiode PD-sensor circuit region 32.
There is shown in FIG. 53 a cross section structure of a unit pixel of the CMOS image sensor 31. In this example, it is constituted as a front-illuminated type by forming a p-type semiconductor well region 36 in an n-type semiconductor substrate 35; a unit pixel 38 composed of a photodiode PD and a plurality of MOS transistors Tr in a p-type semiconductor well region 36 of each region which is partitioned by a pixel separation region 37; a multilayer wiring layer 39 in which multilayers, for example, a first layer wiring 441, a second layer wiring 442, and a third layer wiring 443 are formed, on the substrate front face side, through an interlayer insulation film 43; and further a color filter 41 and an on-chip microlens 42 on the multiplayer wiring layer 39. The photodiode PD is constituted by a buried type photodiode having an n-type semiconductor region 46, and a p+ semiconductor region 47 that becomes an accumulation layer on the front face. Although not shown, it is possible to make the MOS transistors Tr constituting a pixel, for example, as a 3 transistor structure including a readout transistor, a reset transistor, and an amplifier transistor, or a 4 transistor structure in which a vertical selection transistor is further added.
In this CMOS image sensor 31, it is constituted such that after photoelectric conversion is carried out by the photodiode, analog/digital conversion is carried out at once and simultaneously, and the signal is held in the memory means as data, and thereafter, the data is read out from the memory means sequentially. In this constitution, because the signal which has been analog-to-digital converted is once held in the memory means and thereafter signal processing is carried out, simultaneous shuttering is made possible.
However, in the CMOS image sensor having the constitution of FIG. 52, the photodiode PD-sensor circuit region 32 and the ADC-memory region 33 are included in a single semiconductor chip, so that when the number of pixels is increased to achieve high resolution, the opening area of a unit pixel, that is, a minute pixel, becomes small, and high sensitivity cannot not be obtained. Then, chip use efficiency is inferior and the area of a chip is increased, so that cost increase cannot be avoided.